Analog Mixed-Signal Modelling Engineer (PHY + SerDes + Logic Timing)

Job title:

Analog Mixed-Signal Modelling Engineer (PHY + SerDes + Logic Timing)

Company

Marvell

Job description

About MarvellMarvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.Your Team, Your Impact Central Engineering AMS-IP team provides leading-edge SerDes PHY solutions and other Analog Mixed-Signal IPs to support all Marvell products.What You Can ExpectASIC design engineer responsible the development of behavior models of high-performance SerDes analog circuits for use in digital and system verification.The responsibilities include but not limited to:

• Develop accurate and simulation-efficient analog behavior models for SerDes analog circuits in SystemVerilog.
• Verify analog behavior models are accurate representations of analog schematics.
• Document modeling and verification results for formal review.
• Improve analog modelling design methodology and flow.
• Collaborate with Analog/Digital design teams to deliver the competitive SerDes IP solutions for all the Marvell product lines.
• Provide the support to the product teams, for both pre and post silicon

What We’re Looking ForBachelor’s degree in Computer Engineering, Electrical Engineering and 2+ years of related professional experience or Master’s/PhD in Computer Engineering, Electrical Engineering.Good personal communication skills and team working spirit.Hardworking and motivated to be part of a highly competent design team.Must be proficient in the following skills:

• Fundamental concepts in digital logic design
• Concepts digital logic timing analysis
• Verilog/VHDL coding and Lint tools

Highly desirable skills:

• Experience with MAC and PHY integration
• Experience with silicon validation
• Micro-controller 8051 or ARM Cortex experience
• Micro-controller firmware experience
• Synthesis using Synopsys or Cadence tools
• Timing analysis using Primetime
• DFT concepts of Scan, BIST

Additional Compensation and Benefit ElementsWith competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our page.All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.#LI-SC1

Expected salary

Location

Toronto, ON

Job date

Fri, 08 Nov 2024 06:42:07 GMT

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