Silicon Design Engineer, RTL design for SoC IPs

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WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.

THE ROLE:

AMD’s Adaptive and Embedded Computing Group (AECG) is looking for a SoC design engineer to create leading edge IP’s used in a wide variety of applications. The focus of this role is to design, plan, and execute RTL design for SoC IPs.

This role is not eligible for visa sponsorship.

THE PERSON:

Successful candidate will have an SOC/ASIC Design background, would have participated in several silicon design projects with increasing level of scope/responsibilities and has a history of achieving results through effective execution.

KEY RESPONSIBILITIES:

• Write micro-architecture documentation and own major portions of the design and implementation of blocks to meet functional, timing, area, and power requirements.
• Collaborate with architecture and hardware teams to understand the requirements.
• Help lead and mentor other engineers to achieve project goals and organizational growth.
• Work with verification and physical design teams to achieve high quality design and successful tape outs.
• Design and implement logic functions that enable efficient test and debug.
• Contribute in cross-functional teams to solve novel problems across multiple functional areas in development of required features.
• Implement automation to increase design team efficiency.

PREFERRED experience:

• Must have proven track record of ASIC design on several production tape-outs.
• Experience in Designing RTL block for an SOC.
• Experience in integrating ASIC IP into an SOC.
• Experience with Arm architecture and APB, AMBA protocols.
• Experience with PCIe transaction layer protocol.
• Experience with synthesis, static timing analysis & optimizations.
• Experience with writing timing constraints and exceptions.
• Experience with automation using scripting techniques such as PERL, Python or Tcl.
• Experience with using AI tools.
• Ability to develop clear and concise engineering documentation.
• Ability to organize and presentcomplex technical information.
• Strong verbal and written communication skills.
• Exhibit strong ownership of tasks and responsibilities.

ACADEMIC CREDENTIALS:

Bachelor’s or master’s degree in computer engineering/Electrical Engineering

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Benefits offered are described:AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status.

 

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